TSMC

TSMC has entered into a preliminary agreement with the U.S. Department of Commerce, securing up to $6.6 billion in direct funding and access to up to $5 billion in loans under the CHIPS and Science Act. With this latest round of support from the U.S. government, TSMC in turn will be adding a third fab to their Arizona project, with its investment in the region soaring to more than $65 billion. This move not only signifies the largest foreign direct investment in Arizona but also marks one of the biggest support packages that the U.S. government plans to make under the CHIPS Act, second only to Intel's $8.5 billion award last month. TSMC is currently equipping its Fab 21 phase 1 and expects that it...

Sales of Fab Tools Surge to Over $71 Billion in 2020

SEMI, an organization representing chipmakers and producers of semiconductor production tools, published this week that sales of wafer processing equipment has surged to an all-time record of $71.19 billion...

18 by Anton Shilov on 4/15/2021

TSMC Q1 2021 Process Node Revenue: More 7nm, No More 20nm

This week TSMC has disclosed its full quarterly financial results for Q1 2021. In those results the company often explains where the revenue demand is for its technologies, and...

40 by Dr. Ian Cutress on 4/15/2021

AMD Ryzen 5000G APUs: OEM Only For Now, Full Release Later This Year

With the high demand for semiconductors causing most companies to focus on their high margin, high profitability components, I wasn’t expecting to see many launches of low-to-mid range hardware...

67 by Dr. Ian Cutress on 4/13/2021

TSMC to Spend $100B on Fabs and R&D Over Next Three Years: 2nm, Arizona Fab & More

TSMC this week has announced plans to spend $100 billion on new production facilities as well as R&D over the next three years. The world's largest contract maker of...

45 by Anton Shilov on 4/2/2021

EUV Pellicles Ready For Fabs, Expected to Boost Chip Yields and Sizes

Foundries started limited usage of extreme ultraviolet (EUV) lithography for high-volume manufacturing (HVM) of chips in 2019. At the time, ASML's Twinscan NXE scanners were good enough for production...

35 by Anton Shilov on 3/31/2021

Intel’s x86 Designs No Longer Limited to Intel on Intel: IP Blocks for Foundry, Cores on TSMC

Today Intel’s CEO Pat Gelsinger has outlined two key changes to Intel policy: one derived from Intel’s plans to offer foundry services to external partners, and the other from...

70 by Dr. Ian Cutress on 3/23/2021

Report: Semi Demand 30% Above Supply, 20% Year-on-Year Growth

Semiconductor foundry offerings are thriving due to unprecedented demand for semiconductors and processors in recent quarters. Analysts from TrendForce believe that in Q1 2021 foundries will increase their revenue...

31 by Anton Shilov on 2/25/2021

Xbox Series X SoC: Power, Thermal, and Yield Tradeoffs

This week at ISSCC (International Solid State Circuits Conference), Microsoft presented a talk titled ‘Xbox Series X SoC: A Next Generation Gaming Console’, with hardware engineer Paul Paternoster presenting...

82 by Dr. Ian Cutress on 2/15/2021

AMD Reports Q4 2020 Earnings: Analyst Q&A Transcript

At the end of every financial call, invited financial analysts have an opportunity to probe the key members of the company on the numbers, as well as future products...

11 by Dr. Ian Cutress on 1/26/2021

Marvell Announces 112G SerDes, Built on TSMC 5nm

So far we have three products in the market built on TSMC’s N5 process: the Huawei Kirin 9000 5G SoC, found in the Mate 40 Pro, the Apple A14...

15 by Dr. Ian Cutress on 11/17/2020

AMD Zen 3: An AnandTech Interview with CTO Mark Papermaster

The announcement of the new Ryzen 5000 processors, built on AMD’s Zen 3 microarchitecture, has caused waves of excitement and questions as to the performance. The launch of the...

202 by Dr. Ian Cutress on 10/16/2020

AMD Zen 3 Announcement by Lisa Su: A Live Blog at Noon ET (16:00 UTC)

One of the most anticipated launches of 2020 is now here. AMD's CEO, Dr. Lisa Su, is set to announce and reveal the new Ryzen 5000 series processors using...

90 by Dr. Ian Cutress on 10/8/2020

3DFabric: The Home for TSMC’s 2.5D and 3D Stacking Roadmap

Interposers. EMIB. Foveros. Die-to-die stacking. ODI. AIB.TSVs. All these words and acronyms have one overriding feature – they are all involved in how two bits of silicon physically connect...

9 by Dr. Ian Cutress on 9/2/2020

TSMC Launches New N12e Process: FinFET at 0.4V for IoT

One of the main drivers for the semiconductor industry is the growth in always-connected devices that require silicon inside, either for compute, communication, or control. The ‘Internet of Things&rsquo...

27 by Dr. Ian Cutress on 8/27/2020

TSMC: We have 50% of All EUV Installations, 60% Wafer Capacity

One of the overriding central messages to TSMC’s Technology Symposium this week is that the company is a world leader in semiconductor manufacturing, especially at the leading edge process...

32 by Dr. Ian Cutress on 8/27/2020

TSMC and Graphcore Prepare for AI Acceleration on 3nm

One of the side announcements made during TSMC’s Technology Symposium was that it already has customers on hand with product development progressing for its future 3nm process node technology...

2 by Dr. Ian Cutress on 8/27/2020

Where are my GAA-FETs? TSMC to Stay with FinFET for 3nm

As we passed that 22nm to 16nm barrier, almost all the major semiconductor fabrication companies on the leading edge transitioned from planar transistors to FinFET transistors. The benefits of...

37 by Dr. Ian Cutress on 8/26/2020

2023 Interposers: TSMC Hints at 3400mm2 + 12x HBM in one Package

High-performance computing chip designs have been pushing the ultra-high-end packaging technologies to their limits in the recent years. A solution to the need for extreme bandwidth requirements in the...

35 by Andrei Frumusanu on 8/25/2020

TSMC Expects 5nm to be 11% of 2020 Wafer Production (sub 16nm)

One of the measures of how quickly a new process node gains traction is by comparing how many wafers are in production, especially as that new process node goes...

13 by Dr. Ian Cutress on 8/25/2020

TSMC’s Version of EMIB is ‘LSI’: Currently in Pre-Qualification

Whilst process node technologies and Moore’s Law are slowing down, manufacturers and chip designers are looking to new creative solutions to further enable device and performance scaling. Advanced packaging...

19 by Andrei Frumusanu on 8/25/2020

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