From time to time you may see either myself, Anand, or one of the other writers post our thoughts on topics in the forums and news articles. Today, we are going to post a bit of "extended coverage" on our thoughts concerning DDR2. Hopefully, you enjoy our new approach and we encourage you to post your comments!

Even before Computex 2003 we began to first hear some of the upcoming strategies incorporating DDR2 into upcoming Intel platforms.  Several months later, in January, we received confirmation on how and when these technologies were going to appear in upcoming chipsets. 

Today Micron, Elpida and Samsung compose of the majority of the DDR2 market.  Unfortunately there is a lot of confusion about the JEDEC specification.  DDR2 is nearly identical to DDR1, with a few optimizations.  The major optimizations include:

  • 4-bit prefetch (up from 2-bit)
  • Enhanced Registers
  • Additive latency
  • FBGA Packaging
  • On Die Termination
  • DDR2 gets the majority of its punch from the 4 bit prefetch.  DDR2 can effectively write/read four times the amount of data per clock cycle to/from the memory array.  This effectively doubles the data bus speed while keeping the internal bus speed the same from DDR1.  Both DDR1 and DDR2 use a 64-bit interface.

    These optimizations come with the advantage of a slightly lower operating voltage, but requires 240 pins rather than the 184 pins required by DDR today.

    With the talk of different bit prefetches, it becomes difficult to tell the actual clocks of the new memory. Briefly stated, DDR2 runs with a lower internal clock than DDR1. However, since the prefetch is larger than DDR1, the external clock is doubled. For example, if we could run the same DDR400 on the shelves today with DDR2's 4-bit prefetch, it would essentially operate at DDR800. Since this is not possible, the internal bus of the DDR2 modules we see now has been lowered to 100MHz for DDR2-400 and 133MHz for DDR2-533. DDR400 and DDR2-400 should perform the same.

    What does this mean for early adopters?  Essentially; nothing. There will not be a performance increase between DDR2-400 and DDR-400 (or even between DDR2-533 and DDR-533).  DDR2 is the technology to enable post-DDR533 speeds, rather than a technology to enhance it. As we start to see benchmarks of DDR1 versus DDR2 trickle in, consider the maturity of the two technologies.  DDR1 is nearly 5 years old with dozens of chipset manufacturers and billions of dollars in financial backing.  DDR2 still has not even entered full production yet.

    DDR2, today, is still not the DDR2 we will see in mass production come April or May.  Not surprising, Intel has pushed its sample 925X chipsets back another couple weeks to cope with compatibility and performance issues on DDR2.  So, even though PC2-4300 does not perform as well as PC-4300 right now, keep in mind the memory controllers still have some significant changes to undergo.  The timings on today's PC2-4300 are also very poor; most Micron based DDR2 is rated as 4-4-4. Regardless, we should not be looking for performance leaps between DDR2 and DDR1 until memory gets up into the DDR2-667 and DDR2-800 ranges.  According to Intel, VIA and SiS roadmaps, we might see all of these speeds this year.

    With DDR2 memory fixed around $900 for 512MB right now, it is probably unlikely that we will see the enormous rush to Intel's 925X chipset.  Even once prices fall to within range of the DDR prices of today, the newer technology will not really benefit the consumer until we get into the speeds unobtainable by DDR1. 

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    • zhuzhu - Wednesday, March 10, 2004 - link

      Can anybody explain the term "internal clock of Ram" and "external clock of Ram" for me please? Thank you!!!
      Is it the same as the internal clock of the CPU?

      And i still don't understand why DDR2-400 is lowered to 100mhz?

      help me please !!Thank you sooooooooo much!!
    • Jeff7181 - Saturday, February 28, 2004 - link

      It seems to me that DDR2 will start out like RDRAM. Only the richest people who count every last point in Sandra will have it. The rest of us will make do with a 3% performance penalty and keep using DDR.

      I always like to see more work done per clock cycle, just seems more efficient to me. But if this is happening at the expense of RAM timing... it may not be worth much until we're up to DDR800 speeds. Cause I think if manufacturers REALLY wanted to work with current stuff and make it better, they could extend the current technology up to DDR600 and squeeze out some tight timings. However... somewhere along the line it was decided that DDR2 would be better. So... out with the old, in with the new as always... hopefully this isn't another RDRAM fiasco.
    • jpwoodbu - Friday, February 27, 2004 - link

      The extra 56 pins or so are probably going to be used to get more power to the RAM. Since they're running at a lower voltage they won't be able to get as much wattage over the power lines without going over on amps.
    • Odeen - Friday, February 27, 2004 - link

      "The same thing could be said when DDR memory came out over SDRAM. At first it was not much faster than normal SDRAM but in time it scales much higher than SDRAM."

      Actually, the slowest official DDR, 100mhz PC1600 was 50% faster in terms of bandwidth than the fastest official SDRAM, PC133, which had a 1.06gb/sec bandwidth.
    • Odeen - Friday, February 27, 2004 - link

      Well, if it's quad-pumped, shouldn't it be QDR, not DDR? After all, DDR wasn't "SDR2".

      That said.. if that "prefetch" and the number of bits in it merely have something to do with the pumpedness, then the DDR2 moniker is misleading, and I should, by rights, call it, SDR3 :)
    • Dasterdly - Thursday, February 26, 2004 - link

      It's quad pumped.
    • Cygni - Wednesday, February 25, 2004 - link

      Wasnt DDR2 originally supposed to include "Virtual Channels" like the old VC-133 that never took off? I remember reading about that way back when DDR first arrived.
    • ViRGE - Wednesday, February 25, 2004 - link

      One last question: how is this faster, but still using the same width bus. It's still a double-pumped solution, and it's still a 64bit bus, so how is the last 2x being transmitted?
    • Abraxas - Wednesday, February 25, 2004 - link

      since the ram will be operating at a much lower speed does this mean that lowest timings will be easier to achieve with the new DDR2-400 ? that seems like it will be more cost effective.
    • Pumpkinierre - Wednesday, February 25, 2004 - link

      oops sorry still working on SDR + subtraction error should be:'56 pins more than ordinary DDR'

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