# Understanding TLC NAND

by Kristian Vättö*on February 23, 2012 1:14 PM EST*

- Posted in
- Storage
- SSDs
- OCZ
- Indilinx Everest
- TLC

**A Brief Introduction to SSDs and Flash Memory**

In almost every SSD review we have published, Anand has mentioned how an SSD is the biggest performance upgrade you can make today. Why would anyone use regular hard drives then? There is one big reason: price. SSD prices are still up in the clouds when compared to hard drive prices (especially before the Thailand floods) so for many, SSDs have not been a realistic option.

Forking over $700 for a 512GB SSD sounds crazy because a 500GB hard drive can be had for less than $50. Smaller capacities like 64GB and 128GB can already be bought for around $100 and $200 respectively, but unless you have the ability to have an SSD plus hard drive combo, such a small SSD doesn't usually cut it. If you have a desktop, the SSD + HDD combo should not be a problem but many laptops only have space for one 2.5" drive (unless you are willing to mod it afterwards by replacing the optical drive). SSD prices have been dropping for years now, but if the current rate continues it will take years before a $399 Walmart PC includes a reasonable size SSD. So what can be done?

Most of the time, SSD production costs are cut by shrinking the NAND die. Shrinking the die is the same as with CPUs: you move to a smaller manufacturing process, e.g. from 34nm to 25nm. In flash memory, this means you can increase the density per die and usually the physical die size is also smaller, meaning more dies from a single wafer. A die shrink is an effective way to lower costs but moving from one process to another takes time and the initial ramp of the new flash isn't necessarily cheaper. Once the new process has matured and supply has met demand, prices start to fall.

Since die shrinks are a relatively slow way to lower SSD prices and only contribute to steady reduction of prices, anyone looking to push higher capacity SSDs into the mainstream today will need something more. Right now, that "something more" is called Triple Level Cell flash, commonly abbreviated as TLC.

Rather than shrinking the die to improve density/capacity, TLC (like MLC) increases the number of bits per cell. In our SSD Anthology article, Anand described how SLC and MLC flash work, and TLC works the same way but takes things a step further. Normally, you apply a voltage to a cell and keep increasing it until you reach a point where the result is far enough from the "off" state that you now consider the cell as being "on". This is how SLC works, storing one bit per cell. For MLC, you store two bits per cell, which means instead of two voltage states (0 and 1) you have four states (00, 01, 10, 11). TLC takes that a step further and stores three bits per cell, or eight voltage states (000, 001, 010, 011, 100, 101, 110, and 111). We will take a deeper look into voltage states and how they work in the next page.

Even though SLC, MLC and TLC operate the same way, there is one crucial difference. Lets take a look at what happens to a NAND array depending on the amount of data per cell. The image above is a NAND array with ~16 billion transistors (one transistor is required per cell), i.e. 16 gigabits (Gb). This array can be turned into either SLC, MLC, or TLC. The actual array and transistors are equivalent in all three flash types; there is no physical difference. In the case of SLC flash, only one bit of data will be stored in one cell, hence your final product has a 16Gb capacity. When you up the bits per cell to two (MLC), you get 32Gb because now you have two bits per cell and there are still 16 billion cells. Likewise, three bits per cell (TLC) yields 48Gb.

However, TLC is a horse of slightly different color in this case. Capacities usually go in powers of two (2, 4, 8, 16 and so on) and 48 is not a power of two. To get a number that is a power of two, the original NAND array is chopped down. In our example, the array must be 10.67Gb in order to be 32Gb with three bits per cell, but since that is the same capacity as an MLC die, what is the benefit? You don't get more storage per die, but the actual die is smaller because the original 16Gb array has been reduced to a 10.7Gb array. That means more dies per wafer and hence lower cost.

Comparison of NAND Wholesale Prices | |||

Cell Type | SLC | MLC | TLC |

Price per GB | $3.00 | $0.90 |
$0.60 |

*Prices provided by OCZ*

The theoretical price advantage of TLC isn't as great as SLC versus MLC, but it's still significant. In percentage, that is over a 30% reduction. The main reason is that MLC provides twice the capacity when compared to SLC (2bits per cell versus 1bit per cell), whereas TLC provides only 50% more than MLC (3bits per cell versus 2bits per cell). In fact, the price difference between MLC and TLC is directly proportional. TLC die is 33% smaller than a similar MLC die and in the prices provided by OCZ, TLC is also 33% cheaper than MLC. In theory, SLC should follow this equation as well and be priced at $1.80/GB, but there's limited 2Xnm SLC out in the wild, making SLC significantly more expensive than MLC and TLC at this point.

The reality of the matter is a little less clear. TLC NAND today isn't all that much cheaper than MLC NAND, which has contributed to its relative absence in the consumer SSD space. There's also a lack of controller support and market interest, which contribute to the higher prices of course.

## 90 Comments

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## ionis - Friday, February 24, 2012 - link

Both paragraphs you quoted state that TLC has 8 states."TLC takes that a step further and stores three bits per cell, or eight voltage states (000, 001, 010, 011, 100, 101, 110, and 111)."

"With MLC, there are four states, and eight states with TLC. "

## JMC2000 - Friday, February 24, 2012 - link

That is the total number of voltage states per cell, i.e.:1 bpc = 2 voltage states per cell (2^1)

2 bpc = 4 voltage states per cell (2^2)

3 bpc = 8 voltage states per cell (2^3)

The voltage states are what allow each bit to read as 0 or 1. TLC has 8 voltage states to allow intermediary changes in the values of the three bits in each cell: 000, 001, 010, 011, 100, 101, 110 and 111.

## ionis - Friday, February 24, 2012 - link

Yes. That's the argument. So it should go 16->32->64. Where is the 48 coming from?P.S. we're running out of space in this thread!

## Andunestel - Friday, February 24, 2012 - link

The commenter above explained.It's not double each time. The number of combinations, or voltage states, increases exponentially with the number of binary digits represented.

SLC 1 bit (0,1) = 2 states

MLC 2 bits (00,01,10,11) = 4 states

TLC 3 bits ( 000,001,010,011,110,111) = 6 states

Notice that MLC is 100% > SLC, but TLC is only 50% > MLC?

In other words:

SLC = 16GiB

MLC = SLC x 2 = 32 GiB

TLC = SLC x 3 = 48 GiB

- or -

TLC = MLC x 2.5 = 48GiB

## Taracta - Sunday, February 26, 2012 - link

For TLC you have left out 100 and 101 so you would haveTLC 3 bits (000, 001, 010, 011, 100, 101, 110, 111) = 8 STATES!

The information is stored per CELL and the same cell is used for SLC, MLC and TLC. The difference between them is the amount of bits per cell that is all. It is not 1 MLC = 2 SLC or 1 TLC = 3 SLC. It is if cell has:

2 electron states = SLC

4 electron states = MLC

8 electron states = TLC

In binary these states are represented by:

2 states = 1bit

4 states = 2bits

8 states = 3bits

## This Guy - Friday, February 24, 2012 - link

Your confusing bits with data. Let's look at this problem in decimals.If you have one symbol between 0 and 9, you can represent any number 0-9.

If you have two symbols, 0-9, you can represent any number between 0-99

If you have 3, you can represent 0-999

BUT you still only have three symbols.

Back to binary, a SLC stores 1bit, MLC 2bits and a TLC 3bits. So if you have 3 SLCs, you have 3 bits and 8 possible states. Exactly the same as one TLC. I'll expand this to make this point clear:

# Cells | # Bits | # Bits | # States

6 SLC = 6x1bit = 6bits = 2^6 states

3 MLC = 3x2bit = 6bits = 2^6 states

2 TLC = 2x3bit = 6bits = 2^6 states

All three configurations can store the same data. So to answer your question, the logical blocks which SLC, MLC and TLC apear to be based on have sixteen cells per block. Hence:

16 SLC = 16 x 1bit = 16 bits

= 2^16 states

16 MLC = 16 x 2bit = 32 bits

= 2^32 states

16 TCL = 16 x 3bit = 48 bits

= 2^48 states

I know this was long and tedious, but if I'm not going to recheck this tread and I wanted to make sure I gave enough information that most people reading this should be able to understand the difference between bits and data.

## Taracta - Sunday, February 26, 2012 - link

You do notice that in your decimal example that it is increasing by powers of 10 so why in your binary exapmple it is not increasing by powers of 2?16 SLC = 16 x 2^1 bit = 32bits

16 MLC = 16 x 2^2 bit = 64bits

16 TLC = 16 x 2^3 bit = 128bits

No, your exapmples are incorrect so you just further confused the issue.

## KitsuneKnight - Sunday, February 26, 2012 - link

SLC doesn't have two bits, it has one. It's not 2 raised to the blah, it's just blah. Same issue applies to your MLC & TLC examples.SLC can _represent_ two values, 'on' or 'off'. MLC can represent 4 values ('on' or 'off' | 'on' or 'off'). And, likewise, TLC represents 8 values ('on' or 'off' | 'on' or 'off' | 'on' or 'off'). As you might notice, each grouping of 'on' and 'off' is a single bit.

His examples are completely correct.

## JMC2000 - Friday, February 24, 2012 - link

(What I would give for an EDIT function)I forgot to add that if you had 8 bits per cell, you would have 256 voltage states (0 or 1 for each bit, plus the different variations of 8 on or off bits), though I will not list all possible combinations, as it would take too much time/room.

## Taracta - Sunday, February 26, 2012 - link

I completely agree with you. The whole premise of the article is being based on the incorrect graph while having in places, the correct information in the article. There is a difference between place holders and values. SLC - 1 bit place holder 2 bits stored, MLC - 2 bits place holder 4 bits stored and TLC 3 bit place holder 8 bits stored.