ASMedia Demos USB 3.2 Gen 2x2 PHY, USB 3.2 Controller Due in 2019
by Anton Shilov on June 7, 2018 12:00 PM EST- Posted in
- USB
- Trade Shows
- USB-C
- ASMedia
- USB 3.2
- Computex 2018
USB IF published the final USB 3.2 specification in September last year and so developers of controllers and physical interfaces (PHY) started to design their solutions supporting the new tech. As it appears, the development process is proceeding well at ASMedia, which is demonstrating its USB 3.2 PHY at Computex.
The USB 3.2 uses two high-speed USB Type-C Tx/Rx channels to achieve 20 Gbps maximum throughput and while the technology retains the USB 3.1 physical layer data rates and encoding techniques, it still needs a new PHY to work. Just several days ago Synopsys demonstrated its USB 3.2 prototype solution, and apparently, ASMedia also has its USB 3.2 PHY ready. The company does not disclose which process technology it uses for the physical interface, but 10 Gbps data transfer rate is not something that has serious requirements.
Based on the oscilloscope readings, ASMedia’s PHY works nearly ideally, so the next step for the company is building a USB 3.2 Gen 2x2 controller featuring this physical interface.
ASMedia says that its controller will be ready in 2019, but does not specify when exactly. Keeping in mind that it takes some time for actual hardware makers to adopt new controllers, do not expect USB 3.2 devices to hit the market earlier than in 2020.
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12 Comments
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T_manFU - Friday, August 24, 2018 - link
so much stupid in browing these comments.USB ≠ SIMILAR TO TB.
Think of Thunderbolt as EXTERNAL ACCESS TO PCI
Up top?? "Use the same.... WIRES to run your old 1.1 as a freaking 3.x" !?!????
USB isn't a function of wires; it's PROCESSED on the SouthBridge chip. It was the offloading of the chipset / cpu from managing the transfer process that made FWs minimal improvement a proposition to consider.
Pork@III - Friday, June 8, 2018 - link
2019 all new models MB's will come with PCI-E 4.0 and has no problem USB 3.2 to be present at least in high-end motherboards which are connected with a large number of PCI-E lines.